Lightning-Fast Modulation Classification with Hardware-Efficient Neural Networks

The ever-growing demand for data is driving a need for improved radio efficiency for 5G and beyond. Automatic Modulation Classification (AMC), which monitors the RF spectrum for different modulation schemes, is a key part of this. Prior works have successfully applied deep learning to AMC, demonstrating competitive recognition accuracy for a variety of modulations and SNR regimes using deep neural networks (DNNs). To unleash the full potential of this approach in real-world applications, the next step is to deploy this technology with ultra-low latency and high throughput. This requires specialized, hardware-efficient DNNs that take both recognition accuracy and the computational cost into account.

In this talk, we introduce the challenge “Hardware-Efficient Modulation Classification on RadioML”, where the goal is to explore hardware-efficient DNNs on the RadioML 2018 dataset. For this challenge, we provide a repository with a DNN training example, and a quantization-aware training library in PyTorch with a built-in hardware cost metric correlated with achievable throughput and latency. We encourage participants to explore different topologies, quantization to few bits in both weights and activations and pruning in order to create hardware-efficient DNNs that can scale performance to unprecedented levels. Winners will be selected on the basis of the achieved hardware cost that achieves recognition accuracy over a certain threshold.

Speakers, Panelists and Moderators

  • MICHAELA BLOTT
    MICHAELA BLOTT
    Distinguished Engineer
    Xilinx
    Michaela Blott is a Distinguished Engineer at Xilinx Research in Dublin, Ireland, where she heads a team of international scientists driving exciting research to define new application domains for Xilinx devices, such as machine learning, in both embedded and hyperscale deployments. She earned her Master’s degree from the University of Kaiserslautern in Germany and brings over 25 years of leading edge computer architecture and advanced FPGA and board design, in research institutions (ETH Zurich and Bell Labs) and development organizations. She is heavily involved with the international research community serving as the technical co-chair of FPL’2018, DATE’2020, workshop organizer (H2RC), industry advisor on numerous EU projects, and member of numerous technical program committees (FPL, ISFPGA, DATE, etc.) and most recently received the Women in Tech Award 2019.
  • ALESSANDRO PAPPALARDO
    ALESSANDRO PAPPALARDO
    Senior Researcher
    Xilinx
    Alessandro Pappalardo is a Senior Researcher with the Xilinx Research team in Dublin, Ireland, where he works at the intersection of hardware and software for machine learning acceleration, with a particular focus on neural network quantization. He holds a Bachelor’s degree in Computer Engineering from Politecnico di Milano, Italy, and a Master’s degree in Computer Science from the University of Illinois at Chicago, USA.
  • YAMAN UMUROGLU
    YAMAN UMUROGLU
    Senior Research Scientist
    Xilinx
    Yaman Umuroglu is a Senior Research Scientist at Xilinx Research Labs in Dublin, Ireland. He holds a PhD degree from the Norwegian University of Science and Technology (NTNU). His research takes a full-stack view of machine learning with neural networks with a focus on high-efficiency and high-performance implementations and spans hardware-network codesign, techniques for efficient arithmetic, sparsity and quantization, with numerous publications in internationally-recognized journals and conferences.

Date

29 Jun 2021

Time

CEST, Geneva
16:00 - 17:00
Sessions

Topics

5G

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